LS2K1000 · DesignWare GMAC

DW GMAC / LS2K1000

LS2K1000

龙芯中科 · MIPS64 双核 · 国产自主芯片

···Armory 获取

1G网口速率

RGMIIPHY 接口

MIPS64架构

国产自主可控

板卡配置

LS2K1000 EVB龙芯中科官方评估板

稳定

PHY 型号RTL8211E

PHY 地址0x00

PHY 接口RGMII_ID

参考时钟125 MHz (内部 PLL)

特殊说明

• PHY 复位由 GPIO 控制，BSP 需在初始化前拉高并等待 100ms
• MIPS64 大端字节序，驱动已内置字节序转换，无需手动处理

网卡设备树配置

gmac0: ethernet@0x40040000 {
  compatible = "loongson, pci-gmac";
  reg = <0 0x40040000 0 0x8000>;
  interrupt-parent = <&icu>;
  interrupts = <12 13>;
  interrupt-names = "macirq", "eth_wake_irq";
  mac-address = [ 64 48 48 48 48 60 ];/* [>mac 64:48:48:48:48:60 <]*/
  phy-mode = "gmii";
  phy-handle = <&phy0>;
  mdio0:mdio {
    #address-cells = <1>;
    #size-cells = <0>;
    compatible = "snps,dwmac-mdio";
    phy0: ethernet-phy@0 {
      compatible = "ethernet-phy-ieee802.3-c22";	
      reg = <0>;
    };
  };
};

gmac1: ethernet@0x40050000 {
  compatible = "loongson, pci-gmac";
  reg = <0 0x40050000 0 0x8000>;
  interrupt-parent = <&icu>;
  interrupts = <14 15>;
  interrupt-names = "macirq", "eth_wake_irq";
  mac-address = [ 64 48 48 48 48 61 ];/* [>mac 64:48:48:48:48:61 <]*/
  phy-mode = "gmii";
  phy-handle = <&phy1>;
  mdio1:mdio {
    #address-cells = <1>;
    #size-cells = <0>;
    compatible = "snps,dwmac-mdio";
    phy1: ethernet-phy@1 {
      compatible = "ethernet-phy-ieee802.3-c22";	
      reg = <0>;
    };
  };
};

SoC 级说明

网口映射

网口	控制器基地址
eth0	0x40040000
eth1	0x40050000

大端字节序

LS2K1000 默认大端（Big-Endian）模式。DMA 描述符和以太网帧数据均需字节序转换，驱动已内置 be32_to_cpu / cpu_to_be32 处理，应用层无需额外处理。

时钟配置

GMAC 参考时钟通过 CONFREG 寄存器配置，驱动初始化时自动设置为 125 MHz。若系统修改了时钟树，需同步更新 clk_ref 参数。

已知问题

已修复大端模式 DMA 描述符字节序解析错误 — v1.0.1 已修复

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